Embedded systems design and design automation Polimi Group

Research Focus

Embedded systems consist of hardware, software and an environment, involving computations subject to physical constraints. This implies that the design of embedded systems requires a holistic approach that integrates essential paradigms from hardware design and software design in a consistent manner. The typical architecture of these systems, although it may have many aspects in common with general purpose computing systems, in which one or more processors cooperate with dedicated hardware modules through an interconnection network, actually requires more specific optimizations in terms of trade-offs of cost/performance, flexibility, reliability and power consumption. Furthermore, time to market must be minimized.

This research group derives historically from competences both in computer architectures and electronic design automation, with the addition of younger researchers with a background in software domains. The main research focus of the period under consideration has been the study and research in methodologies to support and possibly automate the design of multicore system-on-chip platforms for specific applications, considering both the architectural aspects and the methodological issues.

At the architectural level the research has addressed different aspects aiming at defining a framework for the estimation, exploration and optimization of multi-processor system-on-chip platforms through:

• The definition of estimation and optimization techniques for power consumption and reliability of processors (from RISC processors, to superscalar and VLIW), busses, network-on-chip and memory hierarchies;
• The definition of parametric multiprocessor architectural virtual platforms aiming at providing the validation of tools and methodologies for applications mapping on a given platform and for new techniques of design space exploration for performance, power consumption and reliability;
• The definition of dynamically reconfigurable multiprocessor systems based on commercial FPGA boards.

In conjunction with the architectural aspects, the research group has studied and developed tools and methodologies to support the designers in mapping applications onto multiprocessor-based platforms. These methodologies face all levels of abstractions of the concurrent hardware/software design flow:

• System-level modeling, specification and verification through simulation of hardware/software systems;
• Methodologies for design space exploration and partitioning of system-level specifications based on static and dynamic metrics in order to identify the best hardware/software mapping and software tasks allocation on multiprocessor platforms. The metrics are tailored for optimization of performance, power consumption and/or reliability on a given type of platform;
• Methodologies and tools for synthesis and simulation of hardware, software and communication components for multi-processor-based platforms aiming at optimizing performance, reliability or power consumption;
• Methodologies for synthesis of dynamically reconfigurable systems on FPGA-based platforms.

Future directions in the research of embedded system design is directed toward the definition of frameworks for the exploration of the best architectural trade-offs for heterogeneous Multiprocessor System on Chip for different application domains.

Lab infrastructures

The micro architectures laboratory, MicroLAB, is mainly located at the DEI (Department of Electronics and Information), via Ponzio, 34/5, and part of it is located at the Lecco campus of Politecnico. One of the main activities of the MicroLAB is the design of system architectures, and the definition of design methodologies and tools to support the development of hardware/software embedded systems, in the telecommunication, automotive, industrial and consumer fields. Main efforts are devoted to the development and experimentation of methodologies for developing multiprocessors systems on a single chip ( MPSoC - Multiprocessor System on Chip), studying methodologies to model, simulate, design and optimize those architectures, both in terms of performance and power consumption (JTST cards are used for the study of heterogeneous multiprocessors systems DSP-ARM). A common software framework infrastructure has been defined and has been implemented in the MicroLAB to allow all tool developers to concentrate on the specific algorithms and not in the parsing of system-level or software specifications. This framework supports the research on high-level synthesis of hardware designs, the research on parallelism extraction for software and hardware/software partitioning, the research in the definition of metrics for the analysis and mapping onto multiprocessor architectures and for the dynamic reconfigurability design flow. The Microlab experiments with different reconfigurable architectures based on Xilinx, Altera and ATMEL FPGAs on different application domains and in the design of different multiprocessor architectures.

The lab has benefited from donations by Intel, ATMEL, Xilinx, Altera, STM, and from Synopsys, Mentor Graphics and Synplicity.

Hardware:

• SUN and Intel machines,
• PCs Digilent and AVNET FPGA (Virtex, VirtexIIpro and Spartan3 of Xilinx) boards,
• FPSLIC from Atmel,
• DE2 from Altera DSP boards from Atmel, i.e. Diopsis740
• TC4SOC Evaluation Board from STM with a core ST230 and a Virtex-II XC2V4000

Operating systems:

• Solaris,
• Linux,
• Win2000/XP Windriver,
• uc-Linux

Languages:

• UML C/C++,
• TCL/TK,
• Graphic Libraries,
• Java,
• VHDL,
• Verilog,
• SystemC.

Hardware design toolsuites:

• Mentor Graphics,
• Synopsys,
• Xilinx,
• Synplicity,
• Altera.